IBM’s Dual-Architecture Mainframe Chip Brings Arm Natively to z/Architecture

IBM just showed the computing world a processor that speaks two languages at once. At Hot Chips 2026, the company detailed a forthcoming chip whose individual cores can execute both its long-standing z/Architecture instructions and Arm’s AArch64 instructions. No separate silicon blocks. No emulation layer. Just native, concurrent execution that switches in nanoseconds.

The design marks the first concrete outcome of a collaboration IBM and Arm announced in April. It arrives as mainframe operators hunt for ways to run modern AI and cloud-native software alongside the transaction systems that still process the bulk of the world’s regulated financial traffic. And it does so without asking those core workloads to leave the platform that has delivered decades of high availability.

Native bilingual cores change the equation for enterprise workloads

Christian Jacobi, IBM Fellow and chief technology officer of IBM Systems Development, described the approach in detail. “This is not putting two different core types onto the same chip or some type of emulation, but rather integration of the Arm Instruction Set Architecture (ISA) directly into the mainframe cores,” he said, according to Network World. “By doing that, clients can run a broader range of applications closer to their critical data transactions and AI workloads, reducing complexity while increasing flexibility and deployment choice.”

The chip itself will be built on a 2-nanometer process. It features 11 high-performance cores that run above 5.7 GHz. That’s an increase from the eight cores and 5.5 GHz base frequency of the Telum II processor inside the current z17 generation. Each core carries 36 MB of private L2 cache. Those combine into a 432 MB virtual L3 and up to 3.5 GB of virtual L4. The large, low-latency cache hierarchy targets the data-intensive databases and transaction systems that define mainframe use.

But raw core count and clock speed tell only part of the story. The processor also packs specialized accelerators. AI inference hardware sits ready for in-transaction fraud detection. A dedicated data processing unit handles I/O acceleration. Additional blocks address compression, cryptography and sorting. All of it shares the same die with the dual-ISA cores.

IBM has not yet named the processor or the system that will carry it. Executives expect the design to reach customers around 2028. That timing aligns with the company’s roughly three-year cadence. The z17 mainframes launched in 2025. Their successor, widely speculated to be called z18, would be the logical landing spot.

The technical leap rests on KVM, the Linux kernel virtual machine. IBM already uses KVM to support Linux on its Z systems. The same mechanism now enables AArch64 mode. z/Architecture instructions continue to bypass the hypervisor for maximum performance. Switching between modes happens fast enough that overhead “sort of amortizes to zero,” Jacobi told VentureBeat.

So what does this buy IBM? Access to more than 22 million Arm developers and the libraries that already power much of today’s AI work. “The Arm ecosystem includes more than 22 million developers worldwide and supports a rapidly growing portfolio of cloud-native, AI, analytics, infrastructure, and enterprise applications,” wrote Meredith Stowell, IBM vice president for the zSystems Ecosystem, in the company’s official announcement on IBM Newsroom.

Mohamed Awad, Arm’s executive vice president for cloud AI, framed the partnership in similar terms. As AI scales, more of the computing world converges on Arm. The new chip lets that convergence reach the most demanding enterprise environments without forcing customers to choose between reliability and access to fresh software.

Analysts note the move also signals a quiet admission. Independent software vendors have focused their newest development elsewhere. The mainframe’s proprietary instruction set, while rock-solid for transactions, has limited its appeal for the latest generation of tools. By importing Arm compatibility at the hardware level, IBM hopes to reverse that trend.

Yet the change won’t arrive overnight. Customers will need time to test, certify and support Arm-based workloads on the platform. Pricing, distribution and vendor commitments remain open questions. Even so, the architecture itself removes the most obvious technical barrier.

Performance comparisons already look favorable. The larger core count, higher frequency and expanded cache hierarchy improve on Telum II even before dual-ISA execution enters the picture. When Arm code runs alongside z/OS partitions on the same silicon, latency drops. Data never has to leave the system for separate Arm or x86 servers.

That matters enormously for banks, insurers and governments. These organizations keep their most sensitive workloads on IBM Z precisely because of its security, encryption and fault-tolerance features. Now those features can extend to a much wider catalog of applications. Arm-native Linux environments gain hardware-level fault detection, advanced encryption and AI acceleration without sacrificing the mainframe’s traditional strengths.

The announcement has drawn quick coverage across technology outlets. TechSpot highlighted how customers could add Linux, cloud and AI applications while keeping core transaction workloads on the same system. Tom’s Hardware called it the first processor to treat both instruction sets as “first-class citizens.” Forbes noted that IBM chose to teach its hardware everyone else’s language rather than demand the world learn its own.

Earlier Yahoo Finance coverage had already sensed the shift. The piece questioned whether markets were missing IBM’s move toward Arm integration on its flagship systems. Shares had fallen 22 percent year-to-date at the time, trading near $231 with a forward price-to-earnings ratio of 18.7. Revenue growth stood at a modest 1.1 percent. The new architecture could alter that trajectory if it successfully draws fresh workloads onto the platform.

Of course, mainframes have survived predictions of their demise for decades. Their installed base remains enormous. The combination of extreme reliability—IBM cites 99.999999 percent uptime in some configurations—and massive scale still justifies the cost for many organizations. The dual-ISA processor simply widens the tent.

But. It also forces a reckoning. Success will depend on how quickly software vendors certify their Arm-based offerings for the new systems. How smoothly enterprises integrate the mixed workloads. And whether the promised performance gains materialize once real customer code runs at scale.

IBM has placed a sizable bet. The company has form with dual-architecture designs in other contexts. This time the stakes sit at the heart of its most profitable and strategically vital hardware line. The 2028 target gives the industry time to prepare. It also gives competitors time to respond.

For now the focus stays on the engineering achievement. A single core that fluently handles two historically separate worlds. Low-latency cache resources measured in gigabytes. Accelerators tuned for fraud detection inside live transactions. All on a 2-nanometer die that promises to extend the mainframe’s relevance well into the AI era.

The market will render its verdict when the systems ship. Until then, the technical foundation looks solid. IBM has opened its mainframes to Arm without asking them to abandon what made them indispensable in the first place.