AMIQ EDA Gives AI Agents Access to Essential Design and Verification Data

New DVT MCP Server Product Is Available in Latest Release

AMIQ EDA, a pioneer in integrated development environments (IDEs) for hardware design and verification and a provider of platform-independent software tools for efficient code development and analysis, today announced the availability of Design and Verification Tools (DVT) MCP Server to provide AI agents access to a complete compiled database of design and verification knowledge for semiconductor projects. This validates AI-generated design and verification code and ensures that it is grounded in the project context.

AI agents are widely used for programming, but they are more effective with general-purpose languages than domain-specific languages such as those used for hardware design and verification. Limited training data and lack of context makes it more likely that AI will hallucinate and generate incorrect code. DVT MCP Server provides a quick, tight feedback loop to ground AI reasoning in accurate language semantics and to detect any errors in generated code.

This release is a major milestone for both our team and our users. DVT MCP Server brings us even more firmly into the modern AI-assisted world of chip design and verification.”

— Cristian Amitroaie, CEO of AMIQ EDA

Model Context Protocol (MCP) is an open standard for connecting AI agents to external data and applications. The product family from AMIQ EDA compiles all design and verification files into a rich internal database with the full elaborated hierarchy. DVT MCP Server provides access to this knowledge to guide code generation with context awareness and detailed language checking. This yields valid results that could not be achieved using only generic LLM training data.

DVT MCP Server supports Verilog, SystemVerilog, VHDL, and the e language, enabling AI agents to understand, generate, modify, debug, and correct code for real-world design and verification projects efficiently and accurately. Chip developers can create a more efficient and convergent AI workflow, and enable automated workflows via fleets of AI agents. DVT MCP Server can run within DVT IDE to provide live project context to interactive AI assistants, or operate in batch mode to support fleets of agents.

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DVT MCP Server is a new product available in the latest release from AMIQ EDA. This release also includes major enhancements to other products. DVT IDE AI Assistant has a new agentic mode that helps users perform code generation, exploration, fixing, debugging, and documentation. A new waveform viewer reduces the need for users to jump outside the IDE to other debug tools. A new log viewer supports fast filtering and searching even on very large simulation log files. These two viewers integrate simulation runtime information with the compilation/elaboration database to improve code development and debugging.

AI Assistant, introduced in 2024 for DVT IDE, is now integrated with all AMIQ EDA products. It enables Verissimo SystemVerilog Linter to better explain and auto-correct linting failures in design and verification code. Verissimo also has nearly fifty new rules to provide development teams with more flexibility and more accurate code. AI Assistant helps generate description comments in Specador Documentation Generator, for example to fully document a module or entity, including each port or signal. Specador also now has the ability to generate pass/fail waveforms in the WaveDrom format for SystemVerilog assertions.

“This release is a major milestone for both our team and our users,” said Cristian Amitroaie, CEO of AMIQ EDA. “DVT MCP Server brings us even more firmly into the modern AI-assisted world of chip design and verification. When combined with the increased role of AI Assistant, I am certain that users will find many new ways for our solutions to help them be more productive and produce better results.”